Simulation of computer architectures has made rapid progress recently. The primary application areas are hardware/software performance estimation and optimization as well as functional and timing verification. Recent, innovative technologies such as retargetable simulator generation, dynamic binary translation, or sampling simulation have enabled widespread use of processor and system-on-chip (SoC) simulation tools in the semiconductor and embedded system industries. Simultaneously, processor and SoC simulation is still a very active research area, e.g. what amounts to higher simulation speed, flexibility, and accuracy/speed trade-offs.
This book presents and discusses the principle technologies and state-of-the-art in high-level hardware architecture simulation, both at the processor and the system-on-chip level.
This book reviews innovative technologies for simulation of computer architecture, presenting and discussing the principle technologies and current state of high-level hardware architecture simulation, both at the processor and the system-on-chip level.
Éditeur Rainer Leupers
Éditeur Olivier Temam
Date de publication 23.09.2010
Nombre de pages 345
Type de produit Livre
Dimension 235 x 155 x 155 mm
Poids du produit 1500 g
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